This section is intended to provide information relevant to understanding various technologies described herein. As the section's title implies, this is a discussion of related art that should in no way imply that it is prior art. Generally, related art may or may not be considered prior art. It should therefore be understood that any statement in this section should be read in this light, and not as any admission of prior art.
In the electronics industry, a via is a vertical conductive connection that passes through adjacent layers in an integrated circuit. Typically, a via may be used to electrically connect wiring between physical layers. Some integrated circuits include memory, such as, e.g., Read-Only Memory (ROM), that use transistors to store binary data values, which are programmed during fabrication. Conventional fabrication techniques typically use vias to program ROM. For instance, a via is used to electrically connect a transistor to a bitline to program a logical ‘1’, and a via is left out to electrically disconnect a transistor from the bitline to program a logical ‘0’. Unfortunately, these conventional fabrication techniques are inefficient and costly due to overusing masks. For instance, when programming ROM, multiple mask changes are used for multi-patterning of vias during fabrication.
FIG. 1 illustrates conventional memory circuitry 100, such as, e.g., Read-Only Memory (ROM), as known in the art. As shown, the circuitry 100 includes memory cells 102 having a transistor connected between a bitline BL and a ground line VSB. Some of the memory cells 102 are programmed with a logical ‘1’ by connecting their transistors to the bitline BL with vias 110, and some of the memory cells 102 are programmed with a logical ‘0’ by not connecting their transistors to the bitline BL with vias.